ASE Kaohsiung

QUAD PLCC

Product Overview

PLCC

Plastic Leaded Chip Carrier (PLCC) is widely used in micro-controllers and consumer electronics. Each lead of the PLCC is formed into a J-shape and folded under the package body. ASE provides PLCC packaging services in compliance with JEDEC standard. Lead count ranges from 20 to 84 with 1.27mm (50mil) lead pitch.

PLCC with Drop-in Heat Spreader

The addition of a drop-in heat spreader allows more than 50% power dissipation compared to conventional packages. The drop-in HS drives off the heat from the chip easily by extending the conduction area and transfers more heat via the lead frame. PLCC with drop-in HS is applicable to 84 leads.

Application

ASE's PLCC product was designed in compliance with JEDEC standard for 'J' shape leaded SMT packages. Its robust leads and smaller foot space makes it applicable for surface mount and replaceable plug-in assembly via sockets. Design applications include memory, processors and controllers, ASIC, DSP, PC chipset device for consumer product, automotive and aerospace.

Features

353~1153 mils body sizes

20~84 available lead counts

JEDEC standard compliant

Wide selection of pad size to die size

Heat spreader option

High conductivity lead frame

Wide selection of pad size to meet die size per customer's lead frame design capability

Pb free process ready and available

Reliability

Package Level

All the quad packages selected for temperature/humidity test and temperature cycles are subjected to precondition process per JEDEC moisture LEVEL3 prior to environmental stress. Test criterion is zero defect out of 45 sample units.

Temp/Humidity test	85°C/ 85% RH, 1000 hr (JEDEC 22- A101)
Pressure cooker test	121°C/ 100% RH/ 15 PSIG, 300 hr (JEDEC 22- A102)
Temp cyclic test	-65 ~ 150°C, 1000 CYCLES (MIL-STD-883-1010.7)
High temp storage test	150°C, 1000 hr (JEDEC 22- A103)
High accelerated stress test	130°C/ 85% RH/ 33.5 PSIA, 100 hr (JEDEC 22- A110)

Design Rule

Minimum Ink Size: 15mil (381 um) diameter or non-ink with wafer mapping

Minimum Sawing street width: 3.0 mil (76.2 um)

Wafer Thickness: Back grinding is required if the thickness exceeds ASE's stipulated range

Pkg type	Pkg size	Wafer thickness
PLCC	All	11~30 mil (280~762 um)

Wire Bond Rule
Wire size	Min. bond pad pitch	Min. bond pad opening	Wire loop control
32 um (1.3mil)	140 um	96 um	Max. wire length loop height	180 <20 mils
30 um (1.2mil)	90 um	69 um	Max. wire length loop height	180 <20 mils
28 um (1.1mil)	90 um	65 um	Max. wire length loop height	180 11~15 mils
25 um (1.0mil)	75 um	63 um	Max. wire length loop height	176 11~15 mils

(1mm=39.37mil; 1mil=25.4um)

Performance

Electrical Characterization (Contact ASE R&D for details.)

Thermal (Contact ASE R&D for details.)

PLCC
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The above electrical data is for reference only.

Standard Process/Materials

PLCC/PLCC with Drop-In HS
Wafer mount
Wafer saw/Clean
2nd optical (Gate)
Die attach	Epoxy: SUMITOMO 1033D Lead frame: OLIN 151 (Cu)
Epoxy cure
Wire bond	Gold wire: 99.99% Au
3rd optical (Gate)
Mold(Mold+heat spreader planting)	Compound: SUMITOMO EME-6600CS)
Laser backside marking
Dejunk/Trim
Post mold cure
Electrodeflash
Solder plating	Solder: Sn/Pb=85/15
Top side marking	White ink
Visual/Mechanical inspection (Gate)
Form/Singulation
Final visual inspection (Gate)
Packing	Anti-static tube

Optional process: wafer back grinding/die coating

Package Offering

The alphabetical notation refers to:

A1 Stand-off

A2 Body thickness

L1 Lead length

b Lead width

c L/F thickness

e Lead pitch

Overall thickness is the sum of A1 and A2.

PLCC (All units are in mil. 1mil=25.4um)
Body size		Lead count	A1	A2	b	c	e
D1	E1	Lead count	A1	A2	b	c	e
453	453	28	20	150	17	10	50
653	653	44	20	150	17	10	50
753	753	52	20	150	17	10	50
953	953	68	20	148	17	8	50
1153	1153	84	20	148	17	8	50

Packing & Shipping

PLCC
Body width(mil)	Lead count	Total QTY	Vendor
453	28	39	KO/EG
653	44	27	KO
753	52	24	KO
953	68	19	KO/EG
1153	84	16	KO/EG

For more information, please contact ASE sales office.