| Product Overview |
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Cost savings BGA (CSBGA) is one of 2 types of cavity-down thermally enhanced BGA offered at ASE. It solves thermal dissipation requirements of over 6W. All cavity-down BGAs have the chip seated onto the copper heat sink to conduct the heat. This method desensitizes the performance deviation out of the chip size, and lowers the thermal resistance of junction-to-case ( JC), which makes the external heat sink or fan work more effectively.
Cavity-down BGAs enhance thermal performance by about 15~20% when compared to 4-layer PBGA and by 35% when compared to the 2-layer PBGA. Electrical performance of cavity-down BGA is significant as well. The reason is attributed to their flexible layout for staggered traces on different layers, shorter vias and better shielding effect out of the copper heat sink. With the heat sink covering the signal traces fully, cavity-down BGA provide better resistance to external EMI (electro-magnetic interference) noise. |
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| Application |
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| Applications include high-speed, high-power semiconductors, such as ASICs, Micro processors, Gate Arrays and DSPs. CS BGA market covers telecom/cellular, laptops/sub-notebooks, PDAs, VME CPU/BUS boards, video GUI and wireless. |
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| Features |
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 Superior thermal performance (>6W)
Superior electrical performance
Relative low cost compared with conventional
 cavity down packages
JEDEC MO-192/MS-034 standard outlines |
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| Reliability |
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| Package Level |
| MSL |
JEDEC level 3 30°C/60% RH |
192 hours |
| PCT |
121°C/100% RH/15 psig |
168 hours |
| TCT |
-65°C~150°C |
1000 cycles |
| HAST |
130°C/85% RH/33.5 PSIA |
96 hours |
| HTST |
150°C |
1000 cycles |
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| Thermal |
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| Board Level |
| Temp cycle |
0 to 100°C; 2 cph with 10 minute ramps and 5 minute dwells respectively |
3500 cycles no failed |
| Shock |
1/2 Sine wave; 20G force; 3 drops per
direction per axis (18 drops per sample) |
No failed |
| Vibration |
Random vibration; 1.04 G RMS; 5-500HZ;
1 hour by 3 axis |
No failed |
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| Design Rule |
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| Description |
| A Package size |
| D Min. distance from ball to mold cap |
| E Ball height |
| F Wafer thickness |
| G Package thickness |
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| Definition |
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| (1mm=39.37mil; 1mil=25.4um) |
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| Standard Process/Materials |
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| CSBGA |
| Wafer mount |
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| Wafer saw/Clean |
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| 2nd optical (Gate) |
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| Die attach |
Epoxy: QMI 526 |
| Epoxy cure |
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| Plasma cleanI |
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| Wire bond |
Gold wire: 99.99% Au |
| 3rd optical (Gate) |
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| Pre-baking |
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| Plasma cleanII |
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| Encapsulate |
Liquid encapsulant: HYSOL CB0260-1
 FOR FILL & HYSOL FP4451 FOR DAM |
| Post cure |
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| Solder ball mount |
Solder ball: Sn/Pb=63/37 |
| Flux clean |
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| Plasma cleanIII |
Flux: WATER SOLUBLE |
| Top side marking |
MARKEN 4461 Black ink |
| Ink cure |
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| Final visual inspection (Gate) |
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| Packing |
Bakeable JEDEC tray |
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| Optional process: wafer back grinding / dry packing |
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| Package Offering |
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| Packaging Capability & Outline Dimension |
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| The alphabetical notation refers to: |
| A PKG overall thickness |
| A1 Stand-off |
| b Ball diameter |
| c Substrate thickness |
| e Ball pitch |
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| Body size |
Ball count |
A |
A1 |
b |
c |
e |
| D1 |
E1 |
| 27 |
27 |
256 |
1.70 |
0.1min |
0.6~0.9 |
1.17 |
1.27 |
| 27 |
27 |
352 |
1.65 |
0.1min |
0.5~0.7 |
1.17 |
1.0 |
| 31 |
31 |
416 |
1.65 |
0.1min |
0.5~0.7 |
1.17 |
1.0 |
| 31 |
31 |
304 |
1.70 |
0.1min |
0.6~0.9 |
1.17 |
1.27 |
| 35 |
35 |
368 |
1.57 |
0.1min |
0.6~0.9 |
0.97 |
1.27 |
| 35 |
35 |
420 |
1.70 |
0.1min |
0.6~0.9 |
1.17 |
1.27 |
| 37.5 |
37.5 |
480 |
1.70 |
0.1min |
0.5~0.7 |
1.2 |
1.27 |
| 40 |
40 |
520 |
1.70 |
0.1min |
0.6~0.9 |
1.22 |
1.27 |
| 42.5 |
42.5 |
560 |
1.70 |
0.1min |
0.6~0.9 |
1.17 |
1.27 |
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| Packing & Shipping |
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| Packing & Shipping |
| Body size (mm) |
Row |
Column |
Total QTY |
Max temp(°C) |
Vendor |
| 27x27 |
4 |
10 |
40 |
150 |
PEAK |
| 31x31 |
3 |
9 |
27 |
150 |
PEAK |
| 35x35 |
3 |
8 |
24 |
150 |
PEAK |
| 37.5x37.5 |
3 |
7 |
21 |
150 |
KO |
| 40x40 |
3 |
7 |
21 |
150 |
PEAK |
| 42.5x42.5 |
2 |
6 |
12 |
150 |
PEAK |
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