| Product Overview |
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Flip chip derived its name from the method of flipping over the chip to connect with the substrate or leadframe. Unlike conventional interconnection through wire bonding, flip chip uses solder or gold bumps. Therefore, the I/O pads can be distributed all over the surface of the chip and not only on the peripheral. The chip size can be shrunk, and the circuit path, optimized. Another advantage of flip chip is the absence of bonding wire and thus reducing signal inductance.
An essential process for flip chip packaging is wafer bumping. Wafer bumping is an advanced packaging technique where 'bumps' or 'balls' made of solder are formed on the wafers before being diced into individual chips. ASE has invested significantly in the research and development as well as in equipment for wafer bumping. It has the capacity to bump 150mm, 200mm, 300mm wafers. |
| Flip chip technology is gaining popularity due to: |
- Shorter assembly cycle time - All the bonding for flip chip packages are completed in one process.
- Higher signal density & smaller die size - Area array pad layout increases I/O density. Also, based on the same number of I/Os, the size of the die can be significantly shrunk.
- Good electrical performance - Shorter path between die and substrate improves the electrical performance.
- Direct thermal dissipation path - External heat sink can be directly added to the chip to remove the heat.
- Lower packaging profile - Absence of wire and molding allows flip chip packages to feature lower profiles.
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| Filp Chip in ASE |
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| ASE offers several BGA packages using flip chip technology. |
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I/O |
Pkg size(mm) |
Substrate |
Ball pitch(mm) |
| FC-CSP |
16~200 |
4x4~14x22 |
2/4 layer laminate |
0.5~1.0 |
| Ceramic FC-BGA/PGA |
<1556 |
27x27~50x50 |
ceramic |
0.8~1.27 |
| FC-BGA |
100~1521 |
27x27~40x40 |
2/4 laminate, 4-8 layer build-up |
1.0/1.27 |
| HFC-BGA |
256~1680 |
12x12~45x45 |
2/4 laminate, 4-8 layer build-up |
1.0/1.27 |
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- FC-CSP (Flip Chip Chip Scale Package) offers chip scale capability for I/Os of 200 and less. FC-CSP provides better protection for chip and better solder joint reliability compared with direct chip attach (DCA) or chip on board (COB). FC-CSP is more superior to known good die (KGD) in low-cost test and burn-in, and performs comparable electrical function with KGD. FC-CSP features thin and small profile, and lightweight packages.
- Applications include RFICs and memory ICs. ASE provides packaging service for any customer-designed size at ball pitches ranging from 0.5 to 1.0mm, and no. of I/Os from 16 to 200. The types of encapsulation are underfill and overmold.
- Ceramic FC-BGA/PGA - Ceramic substrate offers better moisture resistance, electrical insulating property and higher thermal conductivity than organic substrate. High Pb solder ball with eutectic solder paste improves board level reliability performance of ceramic packages.
- FC-BGA & High performance FC-BGA (HFC-BGA) - These two packages cater to I/Os of 100 to over 1500 with BT laminate or sophisticated multi-layer build-up substrates. HFC-BGA is thermally enhanced through adding a metal stiffener and heat spreader on the substrate. This method can effectively remove the heat and improve the thermal performance.
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| Complete Flip Chip Solutions |
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| ASE provides complete flip chip services from packaging characterization, substrate design, wafer bumping, wafer sort, flip chip assembly to final test. This total turnkey solution ensures high performance and high quality flip chip packages to meet customers' requirement. |
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| Packaging Capability |
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| Flip Chip Packages |
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| The thickness and the available ball count of flip chip packages are mostly customized. ASE provides several options for enhancing the performance of flip chip packages. They are: |
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- Over molding (for FC-CSP) - The molding is used to protect the chip, substitute underfill to lower cost and improve the thermal performance and 2nd level reliability.
- Heat spreader (for FC-BGA) - The heat spreader provides direct heat conduction by adhering to the rear side of the silicon chip. This method provides 6~8W of thermal dissipation under natural convection.
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| (For more FC-CSP abd FC-BGA information about process, outline dimension and packing, please refer ot Flip Chip BGAs.) |
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